Having been introduced to this project, you may have some desire to follow along. I am thrilled at the prospect of having others follow along on this adventure. The possibility that others might find this project helpful or learn from it in some way is an equally thrilling prospect. However, this is an adventure, and as such, there are risks. This post is to serve as fair warning for those that would follow.

As stated in the introduction, this project began in 2009, and has largely taken place in my mind. Up to this point I have written far too little down, which means most of the project details are still in my head. Part of the reason for these project logs is to get these details into a less volatile form of storage, and after six years, there are many details.

The posts that follow are going to be technical, possibly rambling, and may sometimes be confusing. There will be times when I will go into painstaking detail because that was my thought process. They will likely be at least partially out of order, in part because in many cases I will be trying to incorporate information learned throughout the course of this effort. I will be striving to make these logs readable, which may also contribute to things being somewhat out of order. It also means that I may cover related material in different posts. The subjects may vary, and there will be math.

I will be discussing a great deal of design and the reasoning behind it before I start posting about hardware implementations. This is in part so that when I do start discussing hardware, the reasoning behind certain decisions has been explained.

Sometimes the ideas I write about may seem extraordinarily ambitious, poorly conceived, or simply terrible. Remember that at the time that I had some particular idea I may not have known something I learned later on. As I have taken great pain to avoid relying too heavily on the works of others, I may sometimes present as novel an idea that is not. In cases where I have come to some discovery that I later learned to be well known, I will note it as such.

This project is and always was ambitious. My initial conceptions were for a device approximately the size of a residential washing machine or dryer, although I now expect the finished product to be much smaller. From the beginning I expected the transistor count to be in the thousands, and while this factor is still driving decisions I did not approach this project with a fear of large numbers. It will take several posts(I currently have four new posts partially written, with material for more) simply to catch up to the current state of the project.

Continuing to follow this project may result in headaches, confusion, blurry vision, and weird dreams about logic gates. You have been warned.

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